September 5-8, 2017
Hotel Novotel München City
Munich, Germany

In its 30 years of history the IEEE International System-on-Chip Conference (SOCC) has become the premier forum for sharing the latest advancements in SoC architecture, systems, circuit design, process technology, test, design tools, and applications. We proudly continue this tradition with the 2017 conference in Munich, Germany.

The 30th SOCC offers a three-day technical program including keynote and plenary speeches, oral and poster presentations, hot-topic panel sessions, and exhibitions, and a full day of tutorials held by experts in the field. A high quality social program will complement your conference experience.

Papers are invited which address new and previously unpublished results in all areas related to SoC, including but not limited to:

SOCC Areas of Interest

  • Circuits and Systems:
    RF, analog and mixed-signal — Biomedical — Wireline and wireless communication — Digital signal processing (DSP) — Memory systems — Reconfigurable and programmable circuits
  • Low Power Design:
    "Green" circuits and systems — Low power design methodologies — Power/energy/thermal aware architecture design — Multi-domain power/energy management
  • MPSoC Architecture:
    On-chip interconnect — Network on Chip (NoC) and multicore architectures — Memory architecture for multicore computing — 3D-IC — Heterogeneous computing — Parallel programming and software models
  • Design Methodologies:
    HW-SW codesign, reconfiguration and debug — System level design methodology and tools — Design validation and verification — Design for Testability, test synthesis, embedded test
  • Application Specific Design:
    SoC for driver assist systems — Embedded computing and Internet of Things(IoT) — High-performance mobile SoCs — Security — Real-time, high reliability and safety SoCs — Imaging, vision — Cloud Solutions
  • Emerging and Evolutionary Design:
    Many-core architectures — General purpose GPU (GPGPU) computing — FPGA accelerated computing — Server on a Chip — Cortical processors — Neuronal and neuromorphic computing — Futuristic development and optimization tools.

For information on paper submission please refer to our Call for Papers and follow the Paper Submission Guidelines.

SOCC is also soliciting submissions for the “Design Track” as well as “Special Session” proposals. The intent of the “Design Track” is to provide a forum for engineers in industry to share their expert knowledge and showcase their cutting-edge work in solving issues of SoC development. The “Special Session” proposals are invited but will face the same peer review as regular papers to ensure high quality. For more information, contact us: This email address is being protected from spambots. You need JavaScript enabled to view it..

Organizational Sponsors

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Corporate Sponsors

Interested in sponsoring us?
Look at our call for sponsorship!
Numerous options available.

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