EMBEDDED TUTORIALS
Thursday Morning, Sept. 10, 2009
Chair: Norbert Schuhmann, Fraunhofer IIS
Embedded Tutorial Embedded Tutorial 8:00 a.m. - T1 T2
10:00 a.m.
Designing Multi-Processor Systems-on-Chip
Christian Haubelt,
University of Erlangen-Nuremberg, Germany
Microwave IC Design for Broadband Receivers
Liam M. Devlin, Plextec
Friday Morning, Sept. 11, 2009
Chair: Norbert Schuhmann, Fraunhofer IIS
Embedded Tutorial Embedded Tutorial 8:00 a.m. - F1 F2
10:00 a.m.
Design in the nano-scale Era: Low-Power, Reliability, and Error Resiliency
Kaushik Roy,
Purdue University,
West Lafayette, IN
Introduction to the SystemC AMS DRAFT standard
Karsten Einwich,
Fraunhofer IIS/EAS Dresden
Christoph Grimm,
Vienna University of Technology
Martin Barnasconi,
NXP Semiconductors
Alain Vachoux,
Ecole Polytechnique Fédérale de Lausanne
Thursday Embedded Tutorials
T1
Thursday, Sept. 10, 8:00 a.m. - 10:00 a.m
Designing Multi-Processor Systems-on-Chip
Christian Haubelt, University of Erlangen-Nuremberg, Germany
The continuous increase in size, complexity, and heterogeneity of embedded system design has introduced new challenges in their modeling and implementation. Multi-Processor Systems-on-Chip (MPSoC) design requires high speed models for early verification and performance evaluation. As a result, electronic system level (ESL) modeling has moved up in abstraction from cycle accurate RTL to timed and untimed transaction-level models (TLMs). However, the open question is how to get from a high level system description to a hardware/software implementation? The goal of this tutorial is to answer such questions and to provide system designers and managers with new insight into ESL modeling concepts and synthesis techniques for MPSoCs. In this tutorial, we will cover the key concepts and state of the art tools for MPSoC design. We will discuss TLM semantics for automatic model generation, methods for automatic design space exploration, and hardware/software synthesis. This tutorial is targeted towards embedded software and hardware developers, engineers who use or are interested in using ESL design tools, managers of system designers, and verification engineers.
Biography
Christian Haubelt received his diploma degree in Electrical Engineering from the University of Paderborn, Germany, in 2001. He received his Ph.D. in Computer Science from the University of Erlangen-Nuremberg, Germany, in 2005. Since 2004, he is head of the System-Level Design Automation Group at the Chair of Hardware/Software Co-Design, University of Erlangen-Nuremberg, Germany. He is member of several EDA conference program committees, reviewer for renowned journals, and coauthor of more than 80 publications and a textbook on hardware/software codesign. Dr. Haubelt's research interests include electronic system level design, system level design automation, and multi-objective optimization.
T2
Thursday, Sept. 10, 8:00 a.m. - 10:00 a.m
Microwave IC Design for Broadband Receivers
Liam M. Devlin, Plextec
Broadband ICs find application in defence, instrumentation and communication applications. This paper details the design, realisation and measured performance of five different MMICs developed for broadband receiver applications. The five MMICs described are: A 0.5 to 20GHz dual channel limiter, a 2 to 18GHz dual channel Low Noise Amplifier (LNA), a DC to 20GHz dual channel Single Pole Double Throw (SPDT) switch, a 2 to 18GHz upconverter and a companion downconverter. Photographs of the ICs are shown in . The MMICs can be used to implement a compact, dual channel 2-18GHz receiver and an example of this is also described.
Biography
Liam Devlin is the Director of RF Integration with Plextek. He joined the company in 1996 to develop the RF and microwave IC design capability and since then he has led the design and development of over 40 custom ICs on a range of GaAs and Si processes. He has also led programmes to develop a range of microwave and mm-wave sub-systems at frequencies up to 65GHz. He was previously Chief Designer with Marconi Caswell where he designed GaAs ICs for both the commercial product line and for customer specific applications. Prior to this, Liam was employed by Philips Research Laboratories. He graduated from Leeds University in 1988 with a first class honours degree in electrical and electronic engineering. He has published 35 technical papers.
Friday Embedded Tutorials
F1
Friday, Sept. 11, 8:00 a.m. - 10:00 a.m
Design in the nano-scale Era: Low-Power, Reliability, and Error Resiliency
Kaushik Roy, Purdue University, West Lafayette, IN
Scaling of technology over the last few decades has produced an exponential growth in computing power of integrated circuits and an unprecedented number of transistors integrated into a single chip. However, scaling is facing several problems – severe short channel effects, exponential increase in leakage current, increased process parameter variations, and new reliability concerns. We believe that device aware circuit and architecture design along with statistical design techniques can provide large improvement in power dissipation (Vdd scaling) while providing the required reliability and yield. In this talk I will present design techniques to address power and reliability problems in scaled technologies for both logic and memories.
Biography
Kaushik Roy received B.Tech. degree in electronics and electrical communications engineering from the Indian
Institute of Technology, Kharagpur, India, and Ph.D. degree from the electrical and computer engineering department of the University of Illinois at Urbana-Champaign in 1990.
He was with the Semiconductor Process and Design Center of Texas Instruments, Dallas, where he worked on FPGA architecture development and low-power circuit design. He joined the electrical and computer engineering
faculty at Purdue University, West Lafayette, IN, in 1993, where he is currently a Professor and holds the Roscoe H. George Chair of Electrical & Computer Engineering.
His research interests include VLSI design/CAD for nano-scale Silicon and non-Silicon technologies, low-power electronics for portable computing and wireless communications, VLSI testing and verification, and
reconfigurable computing. Dr. Roy has published more than 450 papers in refereed journals and conferences, holds 8 patents, and is co-author of two books on Low Power CMOS VLSI Design (John Wiley & McGraw Hill).
Dr. Roy received the National Science Foundation Career Development Award in 1995, IBM faculty partnership award, ATT/Lucent Foundation award, 2005 SRC Technical Excellence Award, SRC Inventors Award, Purdue
College of Engineering Research Excellence Award, and best paper awards at 1997 International Test Conference, IEEE 2000 International Symposium on Quality of IC Design, 2003 IEEE Latin American Test Workshop, 2003
IEEE Nano, 2004 IEEE International Conference on Computer Design, 2006 IEEE/ACM International Symposium on Low Power Electronics & Design, and 2005 IEEE Circuits and system society Outstanding Young Author
Award (Chris Kim), 2006 IEEE Transactions on VLSI Systems best paper award. Dr. Roy is Purdue University Faculty Scholar. Dr. Roy was a Research Visionary Board Member of Motorola Labs (2002). He has been in the
editorial board of IEEE Design and Test, IEEE Transactions on Circuits and Systems, and IEEE Transactions on VLSI Systems and has published more than 450 technical papers in refereed journals and conferences. He was
Guest Editor for Special Issue on Low-Power VLSI in the IEEE Design and Test (1994) IEEE Transactions on VLSI Systems (June 2000), IEE Proceedings -- Computers and Digital Techniques (July 2002), special issue on nano
electronics in IEEE Transactions on Circuits and Systems (2007). Dr. Roy is a fellow of IEEE.
F2
Friday, Sept. 11, 8:00 a.m. - 10:00 a.m
Introduction to the SystemC AMS DRAFT standard
Karsten Einwich, Fraunhofer IIS/EAS Dresden
Christoph Grimm, Vienna University of Technology
Martin Barnasconi, NXP Semiconductors
Alain Vachoux, Ecole Polytechnique Fédérale de Lausanne
Speaker: Karsten Einwich
Embedded HW/SW systems interact more and more tightly with their analog physical environment. This leads to systems in which digital HW/SW is functionally interwoven with analog and mixed
-signal blocks such as RF interfaces, power electronics, or sensors and actuators. We call such systems Embedded Analog/Mixed-Signal (E-AMS) systems. A challenge for the development of E
-AMS systems is to understand the interaction between HW/SW and the analog and mixed-signal subsystems (e.g. power drivers, sensors, RF circuits) at architecture level. This requires means for
modeling and simulating the interacting analog/mixed-signal systems and HW/SW systems at functional and architecture level.
SystemC supports modeling of HW/SW systems from the abstract algorithm levevel down to RTL
by providing a discrete event (DE) simulation framework. Transaction Level Modeling (TLM) allows designers to perform abstract modeling, simulation and design of HW/SW system
architectures. However, the SystemC simulation kernel has not been designed for the modeling and simulation of analog, continuous-time systems.
SystemC AMS extensions introduce new language constructs for the design of embedded
analog/mixed-signal systems. The SystemC AMS DRAFT standard was published in December 2008.
The tutorial will present the novel modeling language for analog and mixed-signal functions to
facilitate design and modeling of telecommunications and automotive applications at various levels of abstraction. The concepts beyond the defined language constructs will be presented. A simple
design example will illustrate how these new features facilitate a design refinement methodology for functional modeling, architecture exploration and virtual prototyping of embedded analog and mixed-signal systems.
Biography
Karsten Einwich received the Dipl.-Ing. degree from the University of Technology Dresden in 1993. From 1993 he worked at the Fraunhofer Institute for Integrated Circuits in Dresden in the design automation division. He is head of the system specification group in the mixed signal system department. His work is focused on modelling, simulation and design of complex mixed-signal systems especially for telecommunication and automotive applications. Since 2001 he is engaged in the extension of SystemC for Analogue and Mixed Signal (AMS) designs. He was a co-founder of the SystemC-AMS study group and is now member of the OSCI SystemC-AMS working group.